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| Smart Sixfold Low-Side Switch TLE 5212 G Features * * * * * * * * Overload protection Short circuit protection Cascadeable serial diagnostic interface Overvoltage protection Overtemperature monitoring C compatible input Electrostatic discharge (ESD) protection Open drain outputs Ordering Code Q67000-A9137 P-DSO-28-6 Type TLE 5216 G Application Package P-DSO-28-6 * All kinds of resistive and inductive loads (relays, electromagnetic valves) * C compatible power switch for 12 V applications * Solenoid control switch in automotive and industrial control systems General Description Sixfold Low-Side Switch in Smart Power Technology (SPT) with six independant inputs and six open drain DMOS output stages. The error feedback is done via a serial diagnostic interface. The TLE 5212 G is protected by embedded protection functions (Z-diodes from output to ground) and is particularly suitable for automotive and industrial applications. Semiconductor Group 1 04.97 TLE 5212 G Product Summary Parameter Supply voltage Drain source clamping voltage (OUT1 - OUT6) ON resistance Output current Symbol Values 5.5 ... 24 34 8 0.8 4 x 50 2 x 500 Unit V V mA mA VS VDS(AZ)max RON(typ) 1-4 RON(typ) 5, 6 ID 1-4 ID 5, 6 Pin Configuration (top view) TLE 5212 G Semiconductor Group 2 TLE 5212 G Pin Definitions and Functions Pin No. 1 2 3 4 5 6, 7, 8, 9 10 11 12 13 14 15 16 17 18 19 24 25 26 27 28 Symbol Function IN5 Input switch 5, active HIGH (500 mA) TTL level with hysteresis Supply voltage, must be blocked to ground by capacitor VS SEROUT Diagnostic interface data OUT, connects to SERIN of mother IC or C RESET SERIN GND CS CLK IN7 OUT7 IN6 IN4 IN3 OUT4 OUT3 OUT6 OUT5 OUT2 OUT1 IN2 IN1 Diagnostic interface reset, resets error flag register Diagnostic interface data IN, can be connected to SEROUT of mother IC Ground, cooling, with copper area on PCB Diagnostic interface chip select, signal from C activates data transfer Diagnostic interface clock, signal from C drives data transfer Input switch 7, active HIGH (5 mA), TTL level with hysteresis Output switch 7, not protected, not monitored (5 mA) Input switch 6, active HIGH (500 mA), TTL level with hysteresis Input switch 4, active HIGH (50 mA), TTL level with hysteresis Input switch 3, active HIGH (50 mA), TTL level with hysteresis Output switch 4 (50 mA), self protecting Output switch 3 (50 mA), self protecting Output switch 6 (500 mA), self protecting Ground, cooling, with copper area on PCB Output switch 5 (500 mA), self protecting Output switch 2 (50 mA), self protecting Output switch 1 (50 mA), self protecting Input switch 2, active HIGH (50 mA) TTL-level with hysteresis Input switch 1, active HIGH (50 mA) TTL-level with hysteresis 20, 21, 22, 23 GND Semiconductor Group 3 TLE 5212 G Block Diagram Semiconductor Group 4 TLE 5212 G Application Description Applications in automotive electronics call for intelligent power switches that can be activated by logical signals, which have to be shorted load protected and which provide error feedback. This IC contains six power switches connected to ground (low-side switches). On inductive loads the integrated Z-diodes clamp the discharging voltage. In addition there is a 5 mA low-side-switch, which is not protected against overload and which is not included in the error monitoring. The IC can be connected directly to the battery voltage (5.5 V ... 24 V). By means of TTL signals on the control inputs (active HIGH) all six switches can be activated independently of one another. The inputs are highly resistive and therefore must not be left unconnected but should always be on fixed potential (noise immunity). The serial error feedback interface is cascadeable (see diagram). Circuit Description Input Circuits The control inputs consist of TTL-compatible Schmitt-triggers with hysteresis. Driven by these stages the buffer amplifiers convert the logic signal necessary for driving the DMOS power transistors. Switching Stages The output stages consist of DMOS power transistors with open drain. Each stage has its own protective circuit for limiting power dissipation and shorted load current, which makes the outputs shorted load protected to the supply voltage throughout the operating range. Integrated clamp-diodes limit positive voltage spikes that occur when inductive loads are discharged. Monitoring and Protective Functions Each power output is monitored for overload in its activated status. In deactivated mode open load or short to ground can be detected and differentiated. In case of shorted load the outputs will be shutdown after a delay time of typically 10 s. Shutdown is stored in a flip-flop. A reactivation of the switch is only possible if the concerned input is switched off and on again. The information of every single malfunction is registered and stored in the serial diagnostic interface. If the junction temperature raises beyond 170 C the bit for thermal overload in the serial diagnostic interface is set. The outputs are not shutdown! Semiconductor Group 5 TLE 5212 G The sequence of the bits is as follows: Bit 1 2 3 4 5-7 8-10 11-13 14-16 17-19 Sequence Thermal overload Overload switch 6 Open load switch 6 Short to ground switch 6 Overload, open load, short to ground switch 5 Overload, open load, short to ground switch 4 Overload, open load, short to ground switch 3 Overload, open load, short to ground switch 2 Overload, open load, short to ground switch 1 All errors are stored until the information is read out via the serial interface. The first puls on the clock line resets the error register. This error register can also be reset by a low signal at the RESET pin (pin 12), so it can be set to a defined status while the IC is switched on. Via the SERIN-pin the serial diagnostic interface of a following IC can be connected through to the C. At a supply voltage of VS = 5.5 V to 24 V full function is guaranteed. Semiconductor Group 6 TLE 5212 G Absolute Maximum Ratings Tj = - 40 C to 150 C Parameter Supply voltage Continuous drain source voltage Input voltage Operating temperature range Storage temperature range Output current Output current at reverse poling Output current during clamping (see diagram) Thermal resistance 1) Symbol Values 0 ... 45 - 0.7 ... 25 0...7 - 55 ... 125 Self limited - 500 - 50 700 70 19 60 Unit V V V junction-case1) junction-ambient VS VDS VIN Tj Tstg ID(lim) ID 5, 6 ID 1-4 ID(AZ) 5, 6 ID(AZ) 1-4 RthJC RthJA - 40 ... 150 C A mA mA K/W Pins 6 to 9 and 20 to 23 have to be connected to the ground-plane used as thermal heatsink to achieve the optimum thermal resistance. Note: Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Operating Range Parameter Supply voltage Output voltage Junction temperature Clock frequency design value Symbol Values 5.5 ... 24 - 0.3 ... 24 - 40 ... 125 2 Unit V V C MHz VS VDS(OUT) Tj fCLK Note: In the operating range the functions given in the circuit description are fulfilled. Semiconductor Group 7 TLE 5212 G Electrical Characteristics VS = 6 V to 16 V; Tj = - 40 C to 140 C (unless otherwise specified) Parameter Symbol Limit Values min. typ. Power Supply (VS) Supply current Outputs ON Outputs OFF Power Outputs ON state resistance; Tj = 25 C max. Unit IS 20 15 mA RDS(ON) 1-4 RDS(ON) 5, 6 VDS(AZ) 1-4 VDS(AZ) 5, 6 ID 1-4 max ID 5, 6 ID 1-6 tDON 1-4 tDON 5, 6 tDOFF 1-4 tDOFF 5, 6 24.2 24.2 50 500 8 16 0.8 1.6 32 34 V mA 300 A s s Tj = 140 C ON state resistance; Tj = 25 C Channel 5, 6 Tj = 140 C Clamping voltage ID = 50 mA (OUT1-OUT6) ID = 500 mA Shorted load current VD < 16 V Channel 1-4 Leakage current Turn ON delay time switches OFF; VD = 12 V see diagrams 0.1 1.5 6 1.5 3 2.5 20 2.5 5 Turn OFF delay time see diagrams Digital Inputs (IN1-IN6) Input HIGH voltage Input LOW voltage Hysteresis Input current Digital Input (IN7) Input HIGH voltage Input LOW voltage Hysteresis Semiconductor Group 8 VINH VINL VINHys IIN 1.3 0.9 0.3 -5 1.8 1.2 0.6 2.1 1.5 1.0 5 V V V A VINH VINL VINHys 1.0 0.6 0.3 1.8 1.2 0.6 2.1 1.5 1.0 V V V TLE 5212 G Electrical Characteristics (cont'd) VS = 6 V to 16 V; Tj = - 40 C to 140 C (unless otherwise specified) Parameter Symbol Limit Values min. typ. Diagnostic Interface Inputs (SERIN, CS, CLK) Input HIGH voltage Input LOW voltage Diagnostic Interface Outputs (SEROUT) Output HIGH voltage ISERIN = 0 Output LOW voltage ISERIN = 1 mA Open load voltage monitoring threshold Overload delay time Overtemperature Protection Monitoring threshold (no shutdown!); only a design value max. Unit VINH VINL 3.15 0.9 V V ISERIN = 0.1 mA VS = 12 V VSEROUTH VSEROUTL VSEROUTL VDS(OUT) td(OV) 1-6 3.5 5.4 1 0.2 V V V s 3 10 9 40 TthST 170 C Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 C and the given supply voltage. Semiconductor Group 9 TLE 5212 G Test Circuit Semiconductor Group 10 TLE 5212 G Application Circuit Semiconductor Group 11 TLE 5212 G Block Diagram of Serial Diagnostic Timing Diagram of Serial Diagnostic Interface Semiconductor Group 12 TLE 5212 G Permissible Load Inductance versus Load Current While switching the maximum inductive loads, the maximum temperature Tj of 150 C may be briefly exceeded. The IC will not be destroyed by this, but the restrictions concerning useful life should be observed. Timing Diagram Semiconductor Group 13 TLE 5212 G Package Outlines P-DSO-28-6 (Plastic Dual Small Outline Package) 2.65 max 0.2 -0.1 2.45 -0.2 0.23 +0.0 9 8ma x 7.6 -0.2 1) 1.27 0.35 +0.15 2) 28 0.1 0.2 28x 15 0.4 +0.8 10.3 0.3 1 Index Marking 18.1 -0.4 1) 14 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side GPD05123 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 14 Dimensions in mm |
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